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Microcomputer Components
8-Bit CMOS Microcontroller
C501GV
3 V Specification
Addendum to the C501 Data Sheet 06.97
Advance Information
Edition 06.97 Published by Siemens AG, Bereich Halbleiter, TS Balanstrae 73, 81541 Munchen (c) Siemens AG 1997. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information describes the type of component and shall not be considered as assured characteristics. Terms of delivery and rights to change design reserved. For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies and Representatives worldwide (see address list). Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Siemens Office, Semiconductor Group. Siemens AG is an approved CECC manufacturer. Packing Please use the recycling operators known to you. We can also help you - get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems2 with the express written approval of the Semiconductor Group of Siemens AG. 1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 2 Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health of the user may be endangered.
C501GV
Absolute Maximum Ratings Ambient temperature under bias (TA) .............................................................. 0 C to + 70 C Storage temperature (TST) ...............................................................................- 65 C to + 150 C Voltage on VCC pins with respect to ground (VSS) ............................................- 0.5 V to 6.5 V Voltage on any pin with respect to ground (VSS) ..............................................- 0.5 V to VCC + 0.5 V Input current on any pin during overload condition..........................................- 10 mA to + 10 mA Absolute sum of all input currents during overload condition ..........................| 100 mA | Power dissipation.............................................................................................TBD
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage of the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for longer periods may affect device reliability. During overload conditions (VIN > VCC or VIN < VSS) the Voltage on VCC pins with respect to ground (VSS) must not exceed the values defined by the absolute maximum ratings.
Semiconductor Group
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3 V Specification / 06.97
C501GV
DC Characteristics
VCC = 3.3 V + 0.3V, - 0.6V; VSS = 0 V; TA = 0 to + 70 C
Parameter Input low voltage Input high voltage Output low voltage Ports 1, 2, 3 Port 0, EA, RESET Ports 1, 2, 3 Port 0, EA, RESET Output high voltage Ports 1, 2, 3 Port 0 in external bus mode, ALE, PSEN Logic 0 input current (Ports 1, 2, 3) Logical 1-to-0 transition current (Ports 1, 2, 3) Input leakage current Port 0, EA Pin capacitance 6) Symbol Limit Values min. max. 0.8 V V V V V V V V V V A A - - - 0.5 2.0 - - - - 2.0 0.9 VCC 2.0 0.9 VCC -1 - 25 Unit Test Condition
VIL VIH VOL1 VOL2 VOL3 VOL4 VOH1 VOH2 VOH3 VOH4 IIL ITL
VCC + 0.5
0.45 0.45 0.3 0.3 - - - - - 50 - 250
IOL = 1.6 mA 1) IOL = 3.2 mA 1) IOL = 100 A 1) IOL = 200 A 1) IOH = - 20 A IOH = - 10 A IOH = - 800 A 2) IOH = - 80 A 2) VIN = 0.45 V VIN = 2.0 V
ILI CIO
- -
1 10
A pF
0.45 < VIN < VCC
fC = 1 MHz TA = 25 C
Power Supply Current Parameter Power supply current: 7) Active mode, 12 MHz Idle mode, 12 MHz Power Down Mode Symbol typ. Limit Values max. 9.4 4.4 15 mA mA A
4) 5)
Unit Test Condition
ICC ICC IPD
6.9 3.2 -
VCC = 2 ... 3.6 V 3)
Semiconductor Group
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3 V Specification / 06.97
C501GV
Notes :
1)
Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOL of ALE and port 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operation. In the worst case (capacitive loading : > 50 pF), the noise pulse on ALE line may exceed 0.8 V. In such cases it may be desirable to qualify ALE with a schmitt-trigger, or use an address latch with a schmitt-trigger strobe input. Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall bellow the VIL specification when the address lines are stabilizing.
2)
3)
4)
IPD (Power Down Mode) is measured under following conditions: EA = Port0 = VCC; RESET = VSS; XTAL2 = N.C.; XTAL1 = VSS; all other pins are disconnected. ICC (active mode) is measured with: XTAL1 driven with tCLCH, tCHCL = 5 ns, VIL = VSS + 0.5 V, VIH = VCC - 0.5 V; XTAL2 = N.C.; EA = Port0 = RESET = VCC; all other pins are disconnected. ICC would be slightly higher if a crystal oscillator
is used (appr. 1 mA).
5)
ICC (Idle mode) is measured with all output pins disconnected and with all peripherals disabled; XTAL1 driven with tCLCH, tCHCL = 5 ns, VIL = VSS + 0.5 V, VIH = VCC - 0.5 V; XTAL2 = N.C.; RESET = EA = VSS; Port0 = VCC; all other pins are disconnected; where fOSC is the oscillator frequency in MHz. ICC values are given in mA and measured at VCC = 3.3 V.
This parameter is periodically sampled and not 100% tested. The typical ICC values are periodically measured at TA = +25 C and VCC = 3.0 V but not 100% tested. The maximum ICC values are measured under worst case conditions (VCC = 3.6 V, TA = 0 C).
6) 7)
10
MCS03312
CC
mA Active Mode 8 7 Active Mode 6 5 4 Idle Mode 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 MHz f OSC 12 Idle Mode
Active Mode : CC max = 0.76 x f OSC + 0.24 Idle Mode : CC max = 0.31 x f OSC + 0.63
CC max CC typ
f OSC is the oscillator frequency in MHz. CC values are given in mA.
ICC Diagram
Semiconductor Group
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3 V Specification / 06.97
C501GV
AC Characteristics
VCC = 3.3 V + 0.3V, - 0.6V; VSS = 0 V, TA = 0 C to + 70 C (CL for port 0, ALE and PSEN outputs = 50 pF; CL for all other outputs = 40 pF)
Program Memory Characteristics Parameter Symbol 12 MHz Clock min. ALE pulse width Address setup to ALE Address hold after ALE ALE low to valid instr in ALE to PSEN PSEN pulse width PSEN to valid instr in Input instruction hold after PSEN Input instruction float after PSEN Address valid after PSEN Address to valid instr in Address float to PSEN max. - - - 233 - - 150 - 63 - 302 - Limit Values Variable Clock 1/tCLCL = 1 MHz to 12 MHz min. 2tCLCL - 40 max. - - - 4tCLCL - 100 - - 3tCLCL - 100 - ns ns ns ns ns ns ns ns ns ns ns ns Unit
tLHLL tAVLL tLLAX tLLIV tLLPL tPLPH tPLIV tPXIX tPXIZ*) tPXAV*) tAVIV tAZPL
127 43 30 - 58 215 - 0 - 75 - 0
tCLCL - 40 tCLCL - 53
-
tCLCL - 25
3tCLCL - 35 - 0 -
tCLCL - 20
- 5tCLCL - 115 -
tCLCL - 8
- 0
*) Interfacing the C501 microcontrollers to devices with float times up to 75 ns is permissible. This limited bus contention will not cause any damage to port 0 drivers.
Semiconductor Group
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3 V Specification / 06.97
C501GV
External Data Memory Characteristics Parameter Symbol 12 MHz Clock min. RD pulse width WR pulse width Address hold after ALE RD to valid data in Data hold after RD Data float after RD ALE to valid data in Address to valid data in ALE to WR or RD Address valid to WR or RD WR or RD high to ALE high Data valid to WR transition Data setup before WR Data hold after WR Address float after RD max. - - - 252 - 97 517 585 300 - 123 - - - 0 Limit Values Variable Clock 1/tCLCL = 1 MHz to 12 MHz min. 6tCLCL - 100 6tCLCL - 100 max. - - - 5tCLCL - 165 - 2tCLCL - 70 8tCLCL - 150 9tCLCL - 165 3tCLCL + 50 - ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Unit
tRLRH tWLWH tLLAX2 tRLDV tRHDX tRHDZ tLLDV tAVDV tLLWL tAVWL tWHLH tQVWX tQVWH tWHQX tRLAZ
400 400 30 - 0 - - - 200 203 43 33 433 33 -
tCLCL - 53
- 0 - - - 3tCLCL - 50 4tCLCL - 130
tCLCL - 40 tCLCL - 50
7tCLCL - 150
tCLCL + 40
- - - 0
tCLCL - 50
-
External Clock Characteristics Parameter Symbol min. Oscillator period High time Low time Rise time Fall time Limit Values Variable Clock max. 1000 ns ns ns ns ns Unit
tCLCL tCHCX tCLCX tCLCH tCHCL
83.3 20 20 - -
tCLCL - tCLCX tCLCL - tCHCX
20 20
Semiconductor Group
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3 V Specification / 06.97
C501GV
t LHLL
ALE
t AVLL t
LLIV
t PLPH t LLPL t PLIV
PSEN
t AZPL t LLAX
t PXAV t PXIZ t PXIX
Port 0
A0 - A7
Instr.IN
A0 - A7
t AVIV
Port 2
A8 - A15
A8 - A15
MCT00096
Program Memory Read Cycle
Semiconductor Group
8
3 V Specification / 06.97
C501GV
t WHLH
ALE
PSEN
t LLDV t LLWL
RD
t RLRH
t RLDV t AVLL t LLAX2 t RLAZ
Port 0 A0 - A7 from Ri or DPL Data IN
t RHDZ t RHDX
A0 - A7 from PCL Instr. IN
t AVWL t AVDV
Port 2
P2.0 - P2.7 or A8 - A15 from DPH
A8 - A15 from PCH
MCT00097
Data Memory Read Cycle
Semiconductor Group
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3 V Specification / 06.97
C501GV
t WHLH
ALE
PSEN
t LLWL
WR
t WLWH
t QVWX t AVLL t LLAX2
A0 - A7 from Ri or DPL
t WHQX t QVWH
Data OUT A0 - A7 from PCL Instr.IN
Port 0
t AVWL
Port 2 P2.0 - P2.7 or A8 - A15 from DPH A8 - A15 from PCH
MCT00098
Data Memory Write Cycle
t CLCL VCC- 0.5V
0.7 VCC 0.2 VCC- 0.1
0.45V
t CHCL
t CLCX t CLCH
t CHCX
MCT00033
External Clock Drive at XTAL2
Semiconductor Group
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3 V Specification / 06.97
C501GV
VCC -0.5 V
VIHmin
Test Points
0.4 V
VILmax
MCT03314
AC Inputs during testing are driven at VCC - 0.5 V for a logic '1' and 0.4 V for a logic '0'. Timing measurements are made at VIHmin for a logic '1' and VILmax for a logic '0'. AC Testing: Input, Output Waveforms
VLOAD + 0.1 V VLOAD VLOAD - 0.1 V Timing Reference Points
VOH - 0.1 V
VOL + 0.1 V
MCT00038
For timing purposes a port pin is no longer floating when a 100 mV change from load voltage occurs and begins to float when a 100 mV change from the loaded VOH/VOL level occurs. IOL/IOH 20 mA AC Testing: Float Waveforms
Crystal Oscillator Mode
Driving from External Source N.C.
C
XTAL2
XTAL2
1-12 MHz
C
XTAL1
External Oscillator Signal
XTAL1
C = 20 pF 10 pF (incl. stray capacitance)
MCS03315
Recommended Oscillator Circuits for Crystal Oscillator
Semiconductor Group
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3 V Specification / 06.97
C501GV
Ordering Information Type SAB-C501GV-LN SAB-C501GV-LP Ordering Code Package Q67120-C2017 Q67120-C2016 P-LCC-44 P-DIP-40 Description (8-Bit CMOS microcontroller) for external memory (12 MHz)
Semiconductor Group
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3 V Specification / 06.97

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